User2User Europe 2025
Technical tracks
Offering various touchpoints for users of Siemens electronic design automation tools, this conference provides an opportunity to learn, grow and connect with fellow experts who design leading-edge products.
Explore featured speakers and sessions
Unlock everything you need to become a better user — dive into sessions, tools and insights designed to elevate your skills and expertise.
3D integrated circuit and heterogenous packaging
Die2die interaction and complex stacking configurations necessitate novel approaches to design, modeling and physical verification. Swissbit, Fraunhofer, Intel and Alphawave will present their solutions to these challenges.
Custom integrated circuit verification
Learn how users leverage the Solido artificial-intelligence-powered design, simulation, library characterization and internet protocol validation solutions to optimize quality, improve productivity and accelerate time to market.
Design and implementation
Learn about High-Level Synthesis, RTL-to-GDS implementation and RTL/gate power estimation and optimization, plus power/IR drop signoff. Shorten design time. Eliminate iterations. Create silicon with optimal PPA.
Functional design and verification
Learn how Questa users automate simulation and formal verification, regressions, debugging and coverage closure of complex system-on-a-chip and field-programmable gate arrays to increase productivity and better manage resources.
Hardware-assisted verification
Veloce hardware-assisted verification platforms for emulation, enterprise prototyping and software prototyping allow customers to use a shift-left strategy and accelerate system-on-a-chip software, system design and verification.
Integrated circuits backend
Discover how to verify your devices reliability, power integrity and yield while improving your productivity with our shift-left solutions.
Printed circuit board and systems design
Today's electronics engineers face new challenges. Join peers to explore innovative solutions in electronic systems design, data management, collaboration, co-design, supply chain resilience and performance verification.
Tessent Silicon lifecycle solutions
Create an infrastructure that makes designs more testable to improve quality across the silicon lifecycle. Achieve high-quality test, identify defects/hidden yield limiters, and move beyond test into system debug and validation.