September 27-29 | Anaheim, California
Join Tessent at the International Test Conference 2022
ITC is the world's premier conference dedicated to electronics test. This year's ITC continues its mission to play a unique role as an information-sharing forum, where the wide range of its offerings allows ITC delegates to learn, network and conduct business.
Siemens EDA | Tessent Silicon Lifecycle Solutions
DFT market-leading solutions
Tessent, the industry leader in DFT, delivers innovative solutions that mitigate risks throughout the IC lifecycle & make testing smarter & more efficient. Products include Tessent SSN (Streaming Scan Network) & Tessent Multi-die.
Diamond Supporter presentation
Join us in the Grand Ballroom at ITC at 10.45 am on Tuesday, October 10, for exciting and exclusive DFT technology news. More details provided below.
Theater presentations live in booth #205
Join Tessent in our theater on the exhibit floor during open exhibitor hours, where customers, partners, and Siemens experts will present on key DFT topics.
Tessent design for test at ITC
DON'T MISS THE SPECIAL SIEMENS DIAMOND EVENT
Tuesday, October 10 at 10:45 am following the plenary session, in the Disney Grand Ballroom Center. Darshan Kobla, Senior Director at Microsoft, will describe some of the challenges with the modern silicon designs in his presentation titled Smart DFT for Complex Semiconductor Designs.
Be sure to attend our Diamond Supporter presentations for some exclusive news and announcements including:
- Shift-Left product announcement
Nilanjan Mukherjee, Senior Director of Engineering for Tessent, Siemens - Smart DFT for Complex Semiconductor Design
Darshan Kobla, Senior Director with Microsoft - How to Engineer a Smarter Future Faster
Ankur Gupta, VP/GM of Silicon Lifecycle Solutions, Siemens
LIVE TESSENT THEATER PRESENTATIONS
Open daily to all attendees during exhibit hours.
Join Tessent in booth #205, where customers, partners and Siemens will present live on our latest DFT solutions and key DFT topics, including:
- Tessent Streaming Scan Network (SSN) - a once in a decade technology
- SSN for In-system test
- SSN on-the-fly optimization
- Diagnosis with SSN
- 3D IC solution - Tessent Multi-die
- Tile-based design automation
- ATPG Boost
- Yield learning to boost manufacturing yields
- Measuring analog test coverage
Tessent technical presentations | Schedule
Tuesday, October 10
1:30 pm | A New Framework for RTL Test Points Insertion Facilitating a "Shift-Left DFT" Strategy
Oussama Laouamri, Siemens | Magic Kingdom Ballroom 1
4:40 pm | Global Control Signal Defect Diagnosis in Volume Production Environment
Piotr Zimnowlodzki, Siemens | Magic Kingdom Ballroom 1
Wednesday, October 11
POSTERS | 12:00 - 2:00pm | Expo Floor
Thursday, October 12
11:00 am | Predicting the Resolution of Scan Diagnosis
Jakub Janicki, Siemens EDA | Magic Kingdom Ballroom 2
1:30 pm | Measuring Non-Redundant VIA Test-Coverage for Automotive Designs in Lower Process Nodes
Saidapet Ramesh, NXP with Siemens EDA | Magic Kingdom Ballroom 1
1:30 pm | Will Silent Data Errors Give a New Lease on Life to Semiconductor Test?
PANEL SESSION | Moderator: Anne Meixner, Semiconductor Engineering | Magic Kingdom Ballroom 3
Technical presentations
10:30 - 12:00 pm | Session B6 | Scan-Based Learning and Diagnosis
- B6.2 Industry Evaluation of Reversible Scan Chain Diagnosis
S. Urban, J. Janicki, M. Sharma, W-T. Cheng, Siemens EDA
M. Parley, K. Chung, S. Nicholson, S. Mittal, Qualcomm
1:30 - 3:00 pm | Session A7 | Test Generation
- A7.2 DIST: Deterministic In-System Test with X-masking
J. Tyszer, B. Wlodarczak, Poznan University of Technology
G. Mrugalski, J. Rajski, Siemens Digital Industries Software - A7.3 Test Generation for an Iterative Design Flow with RTL Changes
J. Joe, I. Pomeranz, Purdue University
N. Mukherjee, J. Rajski, Siemens Digital Industries Software
1:30 - 3:00 pm | Session C7 | Special Session
- Design-for-Verification (DfV): A New Direction in Design Qualification
A. Majumdar (Moderator) Presenters: D. Akselrod, A. Banover, P. Yousefpour, AMD