DVCon USA
March 2 – 5, 2026
Hyatt Regency Santa Clara
Santa Clara, CA
Attend our informative workshops, luncheon, keynote, paper and poster sessions, and visit our exhibit booth to learn how Siemens can help you engineer a smarter future faster.
Siemens EDA Activities
High-Level Synthesis Meets FPGA Prototyping in the Cloud
Date TBD | Location
Agentic AI for Autonomous RTL Signoff
Date TBD | Location
Power Dynamics: Shaping the future of the data centric era and the role of AI
Date TBD | Location
Optimizing Functional Fault Grading Flow for Memory Designs – Samsung and Siemens
Date TBD
Early Deep Bug Discovery via Re-run Acceleration and Parallel Multi-Depth Bounded Model Checking (BMC) Exploration – Samsung and Siemens
Date TBD
Managing Verification at Massive Scale
Join this panel of industry experts and practitioners to discuss how verification is evolving as designs scale beyond the practical limits of any single engine. Panelists will share the challenges of coordinating simulation, formal, emulation, prototyping, and verification data, along with the pragmatic approaches teams use today—combining commercial solutions with in-house workflows.
Verification, Validation and HW/SW Challenges
This keynote examines what has changed and why conventional verification struggles to scale or shift-left in this environment, and how connected verification—spanning simulation to emulation to prototyping —enables earlier and more continuous validation of system behavior.
