Siemens EDA
DVCon India 2022
September 5–6, 2022
Radisson Blu, Marathalli, Bangalore
Attend our informative technical keynote, paper, and poster sessions and visit our exhibit booth to learn how Siemens can help you engineer a smarter future faster...
Platinum Keynote
Emerging design/verification technologies and standards —
Which comes first?
Our industry is in a constant struggle between innovation and stability. Standardization efforts need to strike a balance between them. We will look at the timelines for some current standards to see which came first. Then look at a few emerging technologies to see what comes next.
Monday, September 5, 10:00–10:30
Panel
What will it take to fully implement a digital transformation platform
for IP and services?
Tuesday, September 6, 10:15–11:15
Papers & Posters
Paper: What-if analysis of safety mechanism’s impacts on ETHMAC design under functional safety flow
Udaykrishna J, Kapil Kumar, Gaurav Goel, Sachin Pathak & Sujatha Hiremath; RV College of Engineering
Tuesday, September 6, 12:00–12:30, 2A2 - [97]
Paper: Bringing reset domains and power domains together – Non-resettable registers amplifying issues in power-aware RDC verification due to UPF instrumentation
Manish Bhati, Siemens; Inayat Ali, NXP
Tuesday, September 6, 14:30–15:00, 4B1 - [6]
Paper: Solving problems with hierarchal CDC analysis of digital SoC RTL with encrypted blocks
Abdul Moyeen, Siemens; Arpita Agarwal, NXP; Aman Shaikh, Siemens; Abhay Deshpande, NXP
Tuesday, September 6, 15:30–16:00, 4B3 - [87]
Poster: Automating Information Retrieval from EDA Software Reports Using Effective Parsing Algorithms
Manish Bhati, Siemens