Siemens EDA
DVCon India 2024
September 18–19, 2024
Radisson Blu, Marathahalli, Bangalore
Attend our informative technical keynote, panel, paper and poster sessions, and visit our exhibit booth to learn how Siemens can help you engineer a smarter future faster.
Silicon Vision Talk - Wednesday September 18
Empowering Innovation: Harnessing Collective Wisdom Across Tools, Processes, and People
Current D&V flows struggle to meet the demands of AI/ML systems. This keynote will explore macro-trends shaping today's digital transformation before outlining a visionary approach leveraging collective wisdom across tools, processes, workflows, and methodologies for productivity gains beyond the reach of traditional methods.
Industry Panel
Wednesday, September 18
Strengthening India’s Fab Ecosystem: The Critical Role of the Design Community
India’s growing semiconductor industry holds immense potential, but a robust fabrication ecosystem is key to realizing its full promise. This panel will explore the current state of India’s semiconductor fabrication infrastructure and highlight the pivotal role of the design community in shaping its future.
Our panelists will discuss how the design community contributes to advancing India’s semiconductor landscape, emphasizing the importance of collaboration between design teams, fabrication units, and governmental bodies. They will also delve into the critical areas of talent development and education, exploring how India can cultivate the next generation of engineers to meet the demands of an evolving industry.
With a focus on technology and innovation, this session will provide insight into how India can leverage its strengths to drive advancements in chip design, ensuring alignment with global standards. Additionally, panelists will touch upon the role of government policy and infrastructure support in fostering an environment conducive to growth and competitiveness in the global semiconductor market.
Moderator: Sumedha Limaye, Intel
Panelists:
1. Ruchir Dixit, Siemens & IESA – Vice Chair
2. Surya Musunuri, Infineon
3. Pradeep C.R , Ausdia
4. Venkatesh Narasimhan, Silicon Labs
Click here to access the entire DVCon India 2024 program grid.
Short Workshops
Learn how to improve your design's low power performance; and accelerate your protocol D&V from bottom-to-top of the verification stack with these compelling short workshops.
Track 3 - Wednesday, September 18
Short Workshop 3A_1, 11:30 – 12:15, Robusta & Arabica
Find and Fix Excessive Power Dissipation of your Chip Very Early in the Design Cycle
Mohammed Farhad, Siemens
Short Workshop 3A_2, 12:15 – 13:00 pm, Robusta & Arabica
Power Dynamics: Shaping the Future of the Data-Centric Era
Vijay Chobisa, Gaurav Saharawat, Siemens
Track 2 - Wednesday, September 18
Short Workshop 2B_2, 16:45 – 17:30, Grand Victoria A
Portable Stimulus and VIP: Like a Hand in a Glove
Pradeep Salla, Raghavendra HM, Siemens
Click here to access the entire DVCon India 2024 program grid.
Papers and Posters
Deep dive on the following verification topics in these papers and posters; and be sure to follow-up with the presenters!
Paper Session 4C: Functional Safety and RISC-V - Thursday, September 19
4C1:955, 16:00 – 16:30, Brain Box
Leveraging Statistical Random Fault (SRF) Sampling for Efficient Functional Safety with reduced efforts
Gulshan Kumar Sharma, Sougata Bhattacharjee, Akshaya Kumar Jain, Udaykrishna J, Gaurav
Goel and Arun Gogineni, SAMSUNG & SIEMENS
Poster Session - Thursday, September 19
P9:4121, 11:00 – 16:30
Optimised Technique for Implementation of IOL Test-Suite
Vatsal Jain, Krishna Raman Singh and Anmol Kathuria, Siemens