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The skyline of Munich, Germany, including the neo-gothic Neues Rathaus (town hall) in the foreground and the Münchner Dom (Munich Cathedral).

DVCon Europe 2024

Oct. 15-16, 2024
Holiday Inn Munich – City Centre
Munich, Germany

Join us at booth 5 to discuss practical applications of languages, tools, methodologies and standards that can significantly improve your design and verification flows.

Siemens at DVCon Europe 2024 

Join us at booth 5 to discuss practical applications of languages, tools, methodologies and standards that can significantly improve your design and verification flows.  

Reference: The complete program grid.   


Tutorials – Tuesday, Oct. 15 

9:45 a.m. – 11:15 a.m.

T1.1 – G-QED for pre-silicon verification 

Keerthi Devarajegowda

Abstract: https://dvcon-europe.org/program/2024-tutorials#session-2-15  


9:45 a.m. – 11:15 a.m.

T2.1 – Hierarchical CDC and RDC closure with standard abstract models 

Abdel Ayari, Siemens; Joachim Voges, Infineon Technologies AG; Julian Massicot, STMicroelectronics; Jean-Christophe Brignone, STMicroelectronics, James Gillespie, Synopsys

Abstract: https://dvcon-europe.org/program/2024-tutorials#session-2-3


9:45 a.m. – 11:15 a.m. 

T4.1 – A detailed tour of IEEE (Institute of Electrical and Electronics Engineers ) standard P3164 

Joerg Bormann, Siemens, and Miltos Grammatikakis 

Abstract: https://dvcon-europe.org/program/2024-tutorials#session-2-16   


11:30 a.m. – 1 p.m.

T1.2  - "Calling all engines" – faster coverage closure with simulation, formal and emulation   

Yassine Eben-Amine

Abstract: https://dvcon-europe.org/program/2024-tutorials#session-2-13 


11:30 a.m. – 1 p.m.

T3.2  - Developing complex systems using model-based cybertronic systems engineering methodology 

Petri Solanti

Abstract: https://dvcon-europe.org/program/2024-tutorials#session-2-14  


Engineering Papers – Weds., Oct. 16 

10 a.m. – 11 a.m. 

Session 1E – A novel approach for hardware/software (HW/SW) co-verification: leveraging PSS (portable stimulus standard) to orchestrate UVM (universal verification methodology) and C tests 

Wael Mahmoud, Tom Fitzpatrick, Vishal Baskar, and Mohamed Nafea  


11:15 a.m. – noon 

Session 2E – Safety analysis of automated driving platforms using digital twin simulation and runtime monitoring 

Tasneem A. Awaad, Hanya A. Elged, Mohamed A. Abu-Bakr, Sama Y. Fathy, Sara H. Ahmed, Mohamed Abdelsalam and M. Watheq El-Kharashi 


Research Papers – Weds., Oct. 16 

4:15 p.m. - 5:45 p.m. 

Session 4A - Trustworthiness evaluation of deep learning accelerators using UVM-based verification with error injection  

Randa Aboudeif, Tasneem A. Awaad, Mohamed Abdelsalam and Yehea Ismail

Access the complete list of papers.