The chips to systems conference.
Long Beach, CA | July 26-29, 2026 | Booth 1327
We are excited to showcase our software-defined, AI-powered and 3D IC solutions at DAC 2026. These technologies are reshaping the semiconductor industry.
You can design, verify and manufacture integrated circuits (ICs) and electronic systems to innovate faster with a comprehensive Digital Twin powered by Siemens electronic design automation (EDA) solutions.
Industrial-grade and purpose-built for semiconductor, 3D IC and PCB design
AI-driven heterogeneous integration. Chiplet to system
Emulation and Prototyping at the heart of SW-HW verification at scale
Our speakers will present our software-defined, AI-powered, 3D IC and connected verification and validation solutions.
Hear from real customer journeys that are tackling the toughest challenges in modern industry.
Missed a session or want to revisit your favorites? We’ve got you covered. Browse our library of recorded sessions and catch up on all the insights at your own pace.
We are turning to AI to accelerate. This TechTalk explores how purpose-built AI & GenAI platforms are transforming EDA workflows—while addressing the unique challenges of quality, data, & scalability that define chip development.
Our panel discusses the key hurdles in adapting mainstream AI technologies to EDA, including tool integration, domain-specific fine-tuning, and ensuring "industrial-grade" reliability.
Our session explores AI methods in the digital design creation flow. During the session we will show how AI is revolutionizing digital flows today, and how we can further leverage this exciting technology going forward.
Our session explores how scalable, intelligent verification strategies are addressing these challenges through connected workflows, AI-enhanced automation, and data-driven insights.
Our panel aims to bring together experts to discuss and explore solutions for overcoming the challenges associated with Software-Defined-Systems electronics development.
Our panel examines the application domains poised to benefit most from 3D IC technologies and identifies the technical, economic, and ecosystem barriers impeding widespread adoption.
Our session explores the concept of the Semiconductor Digital Thread—a holistic, integrated approach to managing the complete semiconductor lifecycle in the era of software-defined design.
Want a deeper dive into key topics? Our studio sessions deliver focused discussions, expert insights, and practical takeaways, all crafted for optimal learning. Explore this unique collection and enhance your understanding at your own pace.
Integrate Siemens Solido IP Validation with Perforce IPLM. Create a unified, traceable platform for IP quality, streamlining workflows and improving decision-making for semiconductor design teams.
Verify AI/ML designs with Siemens' Questa One Avery VIP. It supports critical protocols like Ultra Ethernet and PCIe Gen 7, ensuring efficient, robust validation for next-gen designs.
See how NVIDIA uses Siemens Insight Analyzer to resolve critical design issues like floating gate leakage. Their custom workflow enhances cross-domain checking and complex isolation control validation.
Neuron IP collaborates with Siemens' Solido Custom IC platform to accelerate analog innovation on advanced nodes. This venture enabled robust design, improved workflows, and faster development cycles.
Calibre 3DStress is a new multi-physics tool for 3D IC design. It accurately simulates chip-level stress, enabling early reliability validation and preventing failures before silicon commitment.
Calibre Vision AI is an AI-guided platform for full-chip physical verification. It offers lightning-fast analysis and intelligent clustering to quickly identify root causes, boosting designer productivity.
NVIDIA highlights its success using Siemens Solido Design Environment. Discover how Solido optimizes their advanced design workflows, accelerating innovation and chip development.
Enhance soft error simulations with IROC TFIT, now integrated with Siemens Calibre LVS. This provides accurate, automated drain/source coordinates for streamlined, reliable soft error analysis.
Assure security with Questa One SFV, featuring Siemens EDA and Caspia Technologies' collaboration. Caspia's automated, Gen AI-driven solutions provide comprehensive, early-stage security verification at the RTL level.
The Siemens EDA AI system revolutionizes chip and PCB design with comprehensive generative and agent AI. It automates complex tasks like debugging and setups, boosting productivity by turning hours of work into seconds.
