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Siemens at DAC 2023

July 9-13 | Moscone Center West | San Francisco

Attend our informative technical sessions and visit our show floor booth to learn how Siemens can help you engineer a smarter future faster.

Siemens EDA booth #2521 (second floor)

DAC 2023 highlights

Siemens EDA DAC activities

Siemens EDA is the platinum sponsor of the Design Automation Conference - the premier event devoted to the designers of electronic chips to systems. This year's conference, co-located with SemiCon West, will take place at the Moscone Center in San Francisco, California, July 9-13. Visit Siemens EDA at our DAC booth, #2521 (second floor), get a free espresso drink and watch our live studio presentations.

DAC 2023 Keynote, Visionary Talk

Visionary Talk

Joseph Sawicki, Siemens EDA

Monday, July 10th, 9:00am - 9:15am PDT in room 3020, 3rd floor

headshot of Joe Sawicki

DAC Pavilion panel

Best of both worlds – bridging the gap between EDA, system and manufacturing

Moderated by Jay Vleeschhouwer, Griffin Securities


  • Tony Hemmelgarn, Siemens Digital Industries Software
  • John Lee, Ansys
  • Tom Beckley, Cadence Design Systems
  • Catherine Kniker, PTC

Monday, July 10th, 10:15am - 11:15am PDT in the DAC Pavilion, level 2 exhibit hall

Transformative Technologies Theater panel

The good, bad and cloudy

Moderated by Ann Mutschler, Semiconductor Engineering


  • Craig Johnson, Siemens EDA
  • Rob Aitken, Synopsys
  • Mahesh Turaga, Cadence Design Systems, Inc.
  • Richard Ho, Lightmatter

Monday, July 10th, 1:00pm - 1:45pm PDT at the Transformative Technologies Theater

Headshot of Craig Johnson 5_27_2022

DAC Pavilion panel

Design considerations and tradeoffs for 2.5D chiplet solutions

Moderated by Ed Sperling, Semiconductor Engineering


  • Tony Mastroianni, Siemens EDA
  • Saif Alam, Movellus
  • Craig Bishop, Deca Technologies
  • Mark Kuemerle, Marvell

Tuesday, July 11th, 2:00pm - 2:45pm PDT in the DAC Pavilion, level 2 exhibit hall

photo of Tony Mastroianni

DAC Pavilion panel

Is systems engineering the solution to the limits of Dennard scaling and Moore's law?

Moderated by Alix Paultre, Endeavor B2B


  • Mark Malinoski, Siemens EDA
  • Larry Williams, Ansys
  • Brett Hillhouse, IBM

Wednesday, July 12th, 2:00pm - 2:45pm PDT in the DAC Pavilion, level 2 exhibit hall

Picture of fiber optic cables lighting a green printed circuit board


Glass interposer integration of logic and memory mhiplets: PPA and signal/power integrity benefits

  • Tuesday, July 11th, 11:10am - 11:25am PDT in room 3010, 3rd floor

G-QED: Generalized QED pre-silicon verification beyond non-interfering hardware accelerators

  • Thursday, July 13th, 2:10pm - 2:25pm PDT in room 3010, 3rd floor


Achieving Verifiable Autonomy: Is Design Automation the Golden Key?

  • Thursday, July 13th, 3:30pm - 5:30pm PDT in room 3014, 3rd Floor