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DAC 2024

Siemens EDA: engineer a smarter future faster

June 23-27 2024 | San Francisco, CA

Design Automation Conference (DAC)
Siemens Booth #2521, Level 2
Moscone West Convention Center

Monday, June 24

Certus: Overcoming Challenges in Foundation IO and ESD: A Journey from Past Achievements to Future Innovations

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Certus: Overcoming Challenges in Foundation IO and ESD: A Journey from Past Achievements to Future Innovations

(22 mins, 48 secs)

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High-Level Synthesis Verification Technologies and Techniques

(16 mins, 49 secs)

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ST Micro: Using Calibre Design Enhancer Via to Improve Design Quality and Reduce Support Cost

(11 mins, 2 secs)

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Microsoft: Focus On IP QA with Solido IP Validation Suite

(7 mins, 57 secs)

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Silicon Solutions: PLL Design and Simulation Using Solido SPICE

(26 mins, 34 secs)

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Hardware Accelerators – Power and Performance

(16 mins, 46 secs)

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Rambus: Challenges of Developing IPs for AI Chips

(12 mins, 58 secs)

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Catapult AI NN – From AI/ML Framework to Optimized RTL

(12 mins, 47 secs)

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Siemens EDA interview with Suk Lee, of Intel Foundry at DAC 2024

(4 mins, 3 secs)

Tuesday, June 25

Portable Stimulus and Verification IP Fit Together Like a Hand in a Glove

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Portable Stimulus and Verification IP Fit Together Like a Hand in a Glove

(24 mins, 53 secs)

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Signature IP: Validating a Scalable PCIe Gen6 Controller Subsystem on Veloce proFPGA

(17 mins, 9 secs)

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Calibre: Design Solutions Roadmap at DAC 2024

(14 mins, 39 secs)

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ST: How AI and Advanced Verification can Help Accelerate .lib Characterization And Analysis To Ensure High Quality SOCs

(21 mins, 47 secs)

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Micron: How Solido’s AI Assisted Design Optimization Handles Extensive Design Spaces

(16 mins, 12 secs)

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Siemens Workflow For Intel Foundry EMIB Heterogeneous Integration Platform

(14 mins, 56 secs)

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Amazon Web Services: Harnessing the Power of AWS Cloud to Scale Siemens EDA Offerings for Chip Designs

(16 mins, 16 secs)

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SiFive: Accelerating the Path to Quality and Performance in RISC-V Processors with FPGA Technology

(15 mins, 29 secs)

Wednesday, June 26

Veloce Cloud: Identifying the Driving Factors for Cloud-Based Hardware-Assisted Verification

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Veloce Cloud: Identifying the Driving Factors for Cloud-Based Hardware-Assisted Verification

(17 mins, 24 secs)

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Accelerated Confidence in Interface Designs Mixing Software Layers, Hardware Protocols, Physical Connections

(18 mins, 18 secs)

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Calibre 3DThermal 3DIC Feasibility Analysis to Final Sign Off Solution

(17 mins, 41 secs)

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SOC Verification Using VirtuaLab

(13 mins, 33 secs)

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Designing for Low-Power? Glitches Can Ruin your Day!

(7 mins, 17 secs)

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Introducing Smart Verification: Unleashing the Potential of AI Within Functional Verification

(30 mins, 56 secs)

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Taking 3DIC Heterogeneous Integration Mainstream

(25 mins, 46 secs)

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Veloce System Interconnect (VSI): Comprehensive Framework for Creation of Digital Twins

(23 mins, 37 secs)

DAC 2024 highlights

Siemens EDA DAC activities

The pace of innovation in electronics is constantly accelerating. To enable customers to deliver life-changing innovations faster and become market leaders, Siemens EDA is committed to delivering the world’s most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services.

Tony Hemmelgarn, President and CEO

At DAC this year, we had the pleasure of hosting two sessions with Tony Hemmelgarn, President and CEO, Siemens Digital Industries Software.

Best of Both Worlds: Bridging the Gaps in Engineering Software for Semiconductors and Systems

Cooley's DAC Troublemaker Panel

Tony Hemmelgarn is president and CEO of Siemens Digital Industries Software, a business unit of Siemens Digital Industries.