Siemens EDA at DAC 2025

Interact with an intuitive touchscreen interface to explore Siemens' end-to-end EDA AI platform. Dive into real demos of agentic automation, GenAI-enhanced productivity, and next-gen EDA tooling.

Get an up-close look at a Ford Mach-E brought to life through Siemens’ PAVE360 platform—a comprehensive digital twin environment for vehicle development. This immersive experience demonstrates how Siemens enables full-system co-design and validation across hardware, software, networks, and embedded systems before a physical prototype ever exists.

Relax, recharge, and get inspired. Our in-booth studio will feature a rotation of short-form presentations from Siemens experts across the EDA portfolio. Topics range from verification and 3D IC to silicon lifecycle management and AI integration.

Achieving industrial-grade AI in EDA: challenges, lessons, and opportunities
Monday, June 23 | 4:30pm - 5:15pm

The rapid evolution of mainstream AI in the past 5 years has been astounding. Typically, AI experts align on a 5-level approach for GenAI, with Level 1 being Chatbots, Level 2 as "Reasoners," Level 3 as "Agents," and Levels 4 and 5 as "Innovators & Organizers." In 2024, Levels 1 and 2 were fairly achieved, Level 3 being the focus for 2025. While mainstream AI has achieved widespread adoption, applying it to complex and "high stakes" engineering and EDA workflows presents unique challenges. This panel will discuss the key hurdles in adapting mainstream AI technologies to EDA, including tool integration, domain-specific fine-tuning, and ensuring "industrial-grade" reliability. We'll reflect on lessons learned from early AI (e.g., machine learning)—what has worked and what hasn't. Looking ahead, we will also discuss the current state of adoption of GenAI and Agentic AI for EDA, addressing whether it is more challenging and what capabilities and automation can power it.

Moderator:
Amit Gupta | VP & GM, Custom IC & Siemens EDA AI | Siemens EDA

Panelists:
Ankur Gupta | Sr. VP & GM, Digital Design Creation Platform | Siemens EDA
AJ Incorvaia | Sr. VP, Electronic Borad Systems | Siemens EDA
Abhi Kolpekwar | VP & GM, Design Verification Technologies | Siemens EDA
Juan Rey | Sr. VP, Calibre Segment | Siemens EDA

Addressing challenges in software-defined systems electronic development
Tuesday, June 24 | 2:30pm - 3:30pm

The advancement of Software-Defined-Systems has transformed the landscape of electronics development, where hardware is now dependent on software architecture. This paradigm shift poses various challenges for electronic development teams, including scaling limitations, multi-domain design and optimization, and maintaining data links across different levels of IC and system integration. Furthermore, the attrition of the engineering workforce and the scarcity of new talent exacerbate these challenges. To effectively tackle these obstacles, organizations must adopt strategies that encompass production-grade AI, efficient requirements capture and modeling, and methodologies supporting software/hardware co-design. As chip-level scaling faces constraints, the integration of chiplets and 3D IC design workflows becomes crucial. Managing cross-domain data within the context of a silicon lifecycle necessitates integration with broader platforms, while also gaining domain-specific insights. Additionally, forming partnerships with foundries and service providers is indispensable for ensuring a responsive software-driven design process. This panel aims to bring together experts to discuss and explore solutions for overcoming the challenges associated with Software-Defined-Systems electronics development. The panelists will delve into topics such as the integration of AI in production processes, effective requirements capture and modeling techniques, software/hardware co-design methodologies, and cross-domain data management. The insights and discussions from this panel will provide valuable guidance for organizations seeking to navigate the complexities of software-driven electronics development and achieve successful outcomes.

Panelists:
Matthew Corbett | Principal Technical Fellow | Collins Aerospace
David Fritz | VP of Hybrid-physical & Virtual Systems | Siemens EDA
Suraj Gajendra | VP of Products & Software Solutions | Arm
Alex Starr | Corporate Fellow | AMD

Scaling 3D IC technologies: from niche to mainstream
Tuesday, June 24 | 4:00pm -5:00pm

As compute demands exponentially increase to power AI-based applications, the urgency for effective chiplet integration solutions has reached an inflection point. Currently, 2.5D and 3D heterogeneous integration technologies remain largely confined to a select group of vertically integrated hyperscaler companies. With mounting scaling challenges and cost pressures across the semiconductor industry, a growing number of companies are evaluating 3D IC architectures as viable alternatives to advanced node monolithic designs. This raises a pivotal question: Is the 3D IC ecosystem prepared to scale from its current limited deployment to a broad, accessible marketplace?

This panel will examine the application domains poised to benefit most from 3D IC technologies and identify the technical, economic, and ecosystem barriers impeding widespread adoption. We will assess the actual market demand for chiplet-based solutions and evaluate industry initiatives to establish the standards, interfaces, and best practices necessary for creating an open and thriving chiplet ecosystem.

Panelists:
Letizia Giuliano | Vice President Product Marketing and Management | Alphawave Semi
Lalitha Immaneni | Vice President, Architecture, Design and Technology Solutions | Intel
Deepak Kulkarni | Senior Fellow | AMD

Engineering the semiconductor digital thread
Wednesday, June 25 | 12:00pm – 12:30pm

Panelists:
Vishal Moondhra | VP of Solutions Engineering | Helix IPLM, Perforce Software
Michael Munsey | VP Semiconductor Industry | Siemens Digital Industries Software